Semiconductor rectifier with improved turn-on
and turn-off characteristics

ABSTRACT

THE SWITCHING CAPABILITIES OF A 4-LAYER BROAD AREA PNPN SEMICONDUCTOR DEVICE ARE DRAMATICALLY IMPROVED BY PROVIDING AN ELECTRODE-LESS AUXILIARY REGION ON ONE OF THE END LAYERS IN THE VICINITY OF THE SMALL AREA WHERE CONDUCTION BEGINS, AND BY CONSTRUCTING AND ARRANGING THE AUXILIARY REGION SO THAT LOAD CURRENT INITIALLY TRAVERSING IT ACTS AS A HIGH-CURRENT PEREMPTORY TRIGGER SIGNAL FOR THE LATERALLY-ADJACENT MAIN REGION OF BROADER AREA.

July 18, 1972 5 cEcco ETAL Re. 27,440

SEMICONDUCTOR RECTIFIER WITH IMPROVED TURN-ON AND TURN-OFFCHARACTERISTICS Original Filed Oct. 22, 1965 3 Sheets-Sheet .1-

INVENTORS. ANGELO L. 056E000, DANTE E. P/cco/v, lsrvA/v So/vros,

BY OWL ATTORNEY United States Patent Oflice Re. 27,440 Reissued July 18,1972 Int. Cl. H01! 9/12 US. Cl. 317-235 26 Claims Matter enclosed inheavy brackets [II appears in the original patent but forms no part ofthis reissue specification; matter printed in italics indicates theadditions made by reissue.

ABSTRACT OF THE DISCLOSURE The switching capabilities of a 4-layer broadarea PNPN semiconductor device are dramatically improved by providing anelectrode-less auxiliary region in one of the end layers in the vicinityof the small area where conduction begins, and by constructing andarranging the auxiliary region so that load current initially traversingit acts as a high-current peremptory trigger signal for thelaterally-adjacent main region of broader area.

This is a continuation-in-part of our patent application S.N. 385,323,filed July 27, 1964, now abondoned.

Th is invention relates to a solid state electric current switch of themultilayer semiconductor type, and more particularly it relates to asilicon controlled rectifier known generally as a thyristor or SCRhaving improved switching characteristics.

Typically an SCR comprises a body of semiconductive material (silicon)having four distinct layers, with contiguous layers being of dilferentconductivity types to form three back-to-back P-N (rectifying) junctionsin series. A pair of main current-carrying electrodes (anode andcathode) are provided in low resistance (ohmic) contact with the endlayers of the silicon body, respectively, and at least one controlelectrode (gate contact) is similarly connected to an accessibleintermediate layer of the body. When connected in an energized electriccircuit, the SCR will ordinarily block appreciable forward current flowbetween its anode and cathode until a small gate current of suitablemagnitude and duration is supplied to the control electrode. Theconstruction and operating theory of such a device are well known in theart, as are its limitations.

One of the recognized limitations of prior art SCRs is their inabilitysafely to endure very high rates of rise of anode current (inrushcurrent slope, or di/dt) during the turn-n process. For example, atypical prior art SCR would the in dangcr of destruction if di/dt werenot limited by a reactor or the like in the external load circuit toless than 50 ampcres pcr microsecond when switching from a forwardblocking voltage of 700 volts. But higher di/dt ratings are necessary insome prospective SCR applications and are always desirable from theviewpoint of reducing the size and the expense of the external currentlimiting means.

We have found that an SCR fails when subjected to too high a di/dtbecause of localized overheating in the silicon body at a spot adjacentto the gate contact. This is the spot or pinpoint area where conductionstarts, and burnout results if the heat that is generated here due to aninitially high current density is excessive compared to the rate atwhich heat can be safely dissipated. The localized hot spot heating isalso atfected by the magnitude of applied voltage, and the maximumallowable di/dt of an SCR therefore decreases with increasing forwardvoltage ratings. At high switching frequencies (for example, above 400turnon-turn'oll cycles per second), this turnon property furtherdeteriorates due to cumulative hot spot heating.

Localized hot spot heating also limits the safe di/dt rating of aconventional SCR when turned on in the forward avalanche" mode. Whenoperated in this mode, as is well known in the art, an SCR turns on inresponse to forward anode-to-cathode voltage increasing to apredetermined breakover magnitude (V even though no gate signal isapplied. We have found that an SCR operat ing in this mode and subjectedto too high a di/dt will fail at a particular spot or pinpoint areawhich is predictable either in the center of the silicon body or nearits periphery.

When an SCR is required to conduct forward current for only a relativelyshort interval of time, as for example in high-frequency inverterapplications, the amount of di/dt to which it is subject during theturn-on process may adversely affect its turn-off characteristics. Inthis case there is insufiicient time for the above-mentioned hot spot tocool before the turn-oft process begins, and the elevated temperaturecontributes to breakdown of the device at this point. We have found thatan intervals of appreciable forward current (for example,IOO-microsecond pulses of 300-amp. magnitude) the turn-off time of priorart SCRs is a direct function of turn-on di/dt. Efforts heretofore madein the art to increase the di/dt rating of SCR's have resulted inundesirably prolonging their minimum turn-off times.

A general object of the present invention is to increase the turn-ondi/dt rating of a solid state controlled rectitier.

Another genera} object of this invention is to increase the di/dt ratingof such a device and concurrently to enable shorter turn-off times to berealized.

A more specific object of the invention is the construction of a siliconcontrolled rectifier having a di/dt rating more than 10 timeshigher thanthat of commercially available prior art SCRs.

Yet another object is the provision of relatively high current and highvoltage SCRs having improved turn-on and turn-off characteristics thatenable them to perform successfully at high switching frequencies.

A further object is to increase the turn-on di/dt rating of a solidstate NPNP semiconductor device that is turned on by avalanchebreakdown.

In carrying out our invention in one form, a body of semiconductivematerial is disposed between spaced-apart contact surfaces of a pair ofmain electrodes. The semiconductor body has a plurality of layersarranged in succession with contiguous layers being of differentconductivity types, whereby rectifying junctions are formed between therespective layers. A predetermined end layer of the body is connected tothe contact surface of a predetermined one of the main electrodes, andthe opposite end layer of the body is connected to the contract surfaceof the other main electrode. An intermediate layer of the body has acontrol electrode connected thereto. According to our invention, saidpredetermined end layer comprises a main region having a major face thatis contiguous with the whole area of the contact surface of thepredetermined main electrode, and a relatively small auxiliary regiondisposed laterally adjacent to said main region between the main regionand the control electrode connection to said intermediate layer of thesemiconductor body.

The aforesaid auxiliary region is so constructed and arranged that uponenergization of the control electrode by a trigger signal to turn on thedevice, load current will initially traverse said auxiliary region and asigniii cant fraction thereof will immediately transfer to a paththrough the intermediate layer that adjoins said predetermined end layerand through the rectifying junction that is formed between saidadjoining layer and the main region of said predetermined end layer. Thetransferred fraction of load current bypasses said auxiliary region andacts as a relatively high-current trigger signal for the portion of saidsemiconductor body subtending the contact surface of said predeterminedmain electrode, thereby quickly and peremptorily causing a steppedtransfer of the load current, before it can attain a damaging level,from the initially triggered pinpoint area that is adjacent to thecontrol electrode connection to a relatively broad area of thesemiconductor body that is next to a peripheral section of the mainregion of said predetermined end layer. After this second triggeringaction there are less watts to dissipate and a comparatively large areais available for dissipating them without localized hot spot heating.Consequently load current can safely proceed to rise abruptly and tospread across the whole area of said main region. Since no hot spot isformed during this two-step, double-triggering turn-on process,subsequent turn-off of the device i expedited.

In another aspect of the invention, the foregoing twostep turn-onprocess and its beneficial results are obtained in a device that turnson in the avalanche mode by mak ing the auxiliary region of the devicesymmetrical with respect to the semiconductor body. This ensures thatload current will initially traverse the auxiliary region even thoughconduction starts at a pinpoint area that is not adjacent to the controlelectrode of the device.

Our invention will be better understood and its various objects andadvantages will be more fully appreciated from the following descriptiontaken in conjunction with the accompanying drawings in which:

FIG. 1 is an elevational view of a silicon controlled rectifiercomprising a hermetically sealed enclosure that is partly broken away inthis figure to show the semiconductor device supported therein;

FIG. 2 is a schematic diagram of the silicon controlled rectifierconnected in an electric circuit;

FIG. 3 is an enlarged elevational view, partly in section and not toscale, of a semiconductor device constructed in accordance with apreferred form of our invention, the device comprising a multilayer bodyof silicon with three electrodes connected thereto;

FIG. 4 is a plan view of the device shown in FIG. 3;

FIG. 5 is a plan view of a similar device that embodies an alternativeform of the invention;

FIGS. 6 and 7 are elevational and plan views, respectively, of anotherembodiment of the invention;

FIG. 8 is a hybrid diagram of a semiconductor device embodying theinvention in its preferred form;

FIG. 9 is an elevational view, similar to FIG. 3, of a modified form ofour invention;

FIG. 10 is a plan view of the device shown in FIG. 9;

FIG. 11 is a plan view of a semiconductor device constructed inaccordance with another aspect of our invention; and

FIGS. 12 and 13 are elevational and plan views, respectively, of yetanother embodiment of the invention.

Referring now to FIG. I, the hermetically sealed enclosure or housing 11is seen to include a base member 12 that serves the combined purposes ofanode terminal, thermal conductor, and supporting member. The basemember 12 is made of good electrical and heat conducting material suchas copper, and it provides a thermal path for conducting heat losses tothe outside ambient. Toward this end it is provided with a threaded stud13 for connection to a heat sink of any conventional form. The basemember 12 is also provided with a circular mounting platform 14 having acentrally disposed flat surface portion on which a semiconductor devicemay be mounted and to which it may be connected for electrical andthermal conduction.

Supported centrally on the platform 14 is an electric component ordevice 15 that includes a body of silicon or other semiconductor such asgermanium. As is shown in detail in other figures to be describedhereinafter, this body comprises a 4-layer wafer having a controlelectrode or gate, thereby forming a silicon controlled rectifier knownin the art as an SCR. As can be seen in FIG. 1, the device 15, which hasa flexible gate lead 16, is sandwiched between the top surface of themounting platform 14 of the base member 12 and the outside bottomsurface of the closed end of a metallic cup 17. The anode of device 15is connected to the mounting platform 14, while the cathode of thedevice is connected to the metallic cup 17.

The cup 17 and the remainder of the SCR enclosure 11 that is shown inFIG. 1 are preferably constructed and arranged in accordance with theteachings of a copending patent application S.N. 436,711, filed for D.B. Rosser on Feb. 12, 1965, and assigned to the assignee of the presentapplication. Reference may be made to that source for the details of theenclosure that are omitted in its brief description here. It should beclearly understood that the particular enclosure design used to supportand to house the semiconductor device 15 is immaterial to the practiceof our invention, and FIG. I is intended for illustration purposes only.

As can be seen in FIG. 1, the illustrated enclosure 11 includes acylindrical insulating body 18 having a metallic ring 19 bonded to itslower end. The ring 19 is joined to the base member 12 by brazing or thelike. The upper end of the insulating body 18 is circumferentiallyjoined and sealed to the open end of the metallic cup 17 by r means ofanother ring not shown in FIG. 1.

A short length of stranded feed-in cable 20 has at its lower end aferrule 21 that is electrically joined to the inside surface of theclosed end of the cup 17. The upper end of the cable 20 extends into atubular member 22 protruding from the crown of a metallic cap 23, thecap 23 being afiixed to the upper end of the insulating body 18. Anotherlength of power feed-in cable 24 is also inserted in the tubular member22, and this member is securely crimped to both of the cables 20 and 24by means of a suitable crimping tool. The external end of the cable 24is provided with a conventional cable terminal 25 that serves as thecathode terminal of the illustrated SCR.

The gate lead 16 of the semiconductor device 15 is made accessible toexternal control circuits by way of a gate feed-through assembly 26, aninsulated wire 27, and a coaxial connector receptacle 28. Thefeed-through assembly 26 extends through an appropriate hole in themetallic cup 17 to which it is hermetically sealed. The insulated wire27 has one end electrically connected to the gate lead 16 by means ofthe feed-through assembly 26, and its other end is electricallyconnected to a center contact of the coaxial connector receptacle 28which extends through a hole in the metallic cap 23. The shell of thereceptacle 28 is connected to the cap 23 by brazing or the like, and itis adapted to receive a cooperating plug assembly 29 terminating acoaxial cable 30. Thus external connections from the wire 27 to a sourceof gate current are provided by means of the cable 30.

In FIG. 2, the above-described SCR is schematically illustrated in anelectric circuit. This circuit comprises the serially connectedcombination of an electric power source represented by the terminals 33and 34, an electric load 35, the anode and cathode terminals 12 and 25of the SCR, and current limiting means 36. A trigger or turn-on signalis applied to the control electrode or gate of the SCR by a suitablesource of current represented in FIG. 2 by terminals 37 and 38 which arerespectively connected (by means of the coaxial connector 28, 29 shownin FIG. I) to the wire 27 and to the cap 23 of the SCR enclosure 11. Thewire 27 is electrically connected to the gate contact of the SCR, andthe cap 23 is electrically connected to its cathode. With forwardblocking voltage across the SCR (anode terminal positive), cathodecurrent can be sufficiently increased by appropriate energization of theterminals 37 and 38 to cause the SCR to switch from a blocking or offstate to a conducting or on state, where upon the gate loses controluntil load current in the SCR is subsequently reduced below the holdingcurrent level and the device reverts to its forward blocking state. AnSCR designed to conduct load current of several hundred amperes can beturned on by applying to its gate a small trigger signal of less thanone-tenth ampere.

As was pointed out hereinbefore, load current in an SCR must not beallowed to exceed a prescribed maximum rate of rise (di/dt) during theturn-on process. For this reason suitable inductance 36 is provided incircuit with the SCR. Such current limiting means is often undesirablebecause of the cost and space that it involves and because it prolongsthe turn-on time of the circuit. It could be eliminated or its sizecould be substantially reduced by using a semiconductor device that isdesigned to have a relatively high di/dt rating, and this desirableresult is achieved with remarkable success by the present invention.

A preferred form of the'present invention is illustrated in FIGS. 3 and4. The device 15 shown therein is seen to comprise a wafer of siliconhaving four relatively thin, circular layers or zones 41, 42, 43, and 44arranged in succession, with contiguous layers being of differentconductivity types. For example, the end layer 41 comprises N-typesilicon, the intermediate layer 42 that is contigous with layer 41comprises P-type silicon, the next intermediate layer 43 comprisesN-type silicon, and the other end layer 44 comprises P-type silicon. Theinterface boundaries between the respective layers of the wafertherefore form rectifying junctions. This NPNP wafer is disposed betweentwo main current-carrying electrodes or metallic contacts 45 and 46having parallel, spaced-apart contact surfaces 45a and 46a,respectively. The contact surface 46a of electrode 46 is superimposed onand bonded to the P-type end layer 44 of the wafer in a manner forming alow resistance ohmic junction therewith, and this electrode comprisesthe anode of device 15. The contact surface 45a of the electrode 45 isconnected in a similar manner to the N-type end layer 41 of the wafer,and this electrode comprises the cathode of the device. An accessibleportion of the [intermedite] intermediate P-type layer 42 and the gatelead 16 of the device 15 are ohmically interconnected by means of acontrol electrode or contact 47 located closely adjacent to the N-typeend layer 41.

The above-described device 15 can be constructed by any of a number ofdifferent techniques that are well known in the transistor and siliconcontrolled rectier arts today. Typical parameters and dimensions wil beset forth hereinafter. While thin solid lines and distinct hatching havebeen used in FIG. 3 to illustrate the various interface boundarics inthe device. those skilled in the art will understand that theseboundaries are not such discretely definable plane surfaces in practice.The main electrodes 45 and 46 of device 15 are respectively adapted tobe connected to the metallic parts 17 and 14 of the previously describedenclosure 11 by any suitable means that will protect the fragilejunctions of the device against thermal and mechanical stresses.

In order to increase the maximum safe di/dt rating of the device 15relative to that obtainable in prior art devices, we have designed theend region 41 of the silicon water so that it has two distinctive,laterally adjacent portions. in FIGS. 3 and 4 these portions areindicated by the reference letters A and B. and hereinafter they will bereferred to as the main region A and the auxiliary region B of the endlayer 41. The main electrode 45 of device 15 is connected only to themain region A which has a major face that is contiguous andsubstantially eoextensive with the whole contact surface 45a. Theadjacent auxiliary rcgion B is small relative to the main region A. andit is disposed between the main region and the gate contact 47. Beinglaterally displaced with respect to the contact surface 451:, theauxiliary region is free of main electrode connections.

The auxiliary region B is so constructed and arranged that uponenergization of the gate contact 47 to turn on the device 15 loadcurrent will initially traverse this region and a significant fractionthereof will immediately transfer to a parallel path through theadjoining layer 42 of the silicon wafer and through the rectifyingjunction that is formed between 42 and the main region A of the endlayer 41. By significant fraction we mean current of sufficientmagnitude to act as a peremptory trigger signal for the portion of thewafer subtending the contact surface 45a of cathode 45 while loadcurrent is still confined to the relatively small initially triggeredarea in the device. As will be further explained below with the aid ofFIG. 8, this nearly instantaneous transfer of current from the auxiliaryregion B of layer 41 to the parallel path including the rectifyingjunction between the main region A and the intermediate layer 42 is dueto the provision of relatively high lateral resistance in the initialcurrent path comprising the auxiliary region B, and it results in adouble-triggering turn-on process during which localized hot spotheating in the silicon wafer is avoided.

While this result can be obtained by altering the electrical propertiesof the auxiliary region B relative to the main region A, we prefer toobtain it by geometry effects Thus in FIGS. 3 and 4 it will be observedthat the contact surface 45a of the cathode 45 is made non circular andasymmetrical, as is the conforming major face or surface of the mainregion A of the circular end layer 41 of the silicon wafer. Theauxiliary region B is extended laterally beyond the edge of theassociated surface 45a for a distance of at least two mils, measuredfrom the periphery of the main region A toward the gate contact 47. Thethickness of B is substantially reduced, being no more than percent asthick as the adjoining portion of the main region A, and therefore itslateral resistance is appreciably higher than that of any part of themain region of corresponding lateral dimension. (The thickness of theregion refers to its dimension [parellel] parallel to the direction ofprincipal current flow between the main electrodes 45 and 46 of thedevice 15, and lateral refers to a direction oriented perpendicularthereto.)

With this construction the current that initially traverses therelatively thin auxiliary region B, upon energization of the gatecontact 47 to turn on the device, causes a potential difference ofsubstantial magnitude to develop in the end layer 41 between the mainregion A and the edge of the auxiliary region B that is closest to thegate contact 47. The beneficial effect of this voltage field will becameapparent hereinafter. Devices built in accordance with the foregoingdescription have exhibited remarkably improved di/dt characteristics.For example. we have been able to subject such a device to a di/dt of1500 amperes per microsecond and successfully turn it on from a 700voltforward blocking condition. Representative parameters and dimensions ofthe device will be set forth for illustration purposes.

The intermediate N-type zone 43 of the silicon wafer that comprises thedevice 15 is a one inch diameter S-rnil thick layer of phosphorous-dopedsilicon having a resistivity of 40 ohm-centimeters. Extending acrossopposite sides of this layer are 3-mil thick P-type layers 42 and 44 ofsilicon with gallium diffused therein, the surface concentration ofgallium being 10" atoms per cubic centimeter. A main electrode 46 ofaluminum is alloyed to the surface of the P-type end layer 44, and al-mil thick N- type end layer 41 of antimony-doped silicon (having auniform concentration of 10 antimony atoms per cubic centimeter) isalloyed to the P-type layer 42. The end layer 41 has a diameter of aboutfive-eighths inch and is concentrically positioned on the adjoininglayer 42, layer 41 being recessed in layer 42 so that the thickness ofthe P-type semiconductor extending under it is only 1.5 mils.

The other main electrode 45 of the device comprises a gold-antimony discbonded to the N-type end layer 41. A peripheral portion of 45 is removedby etching. The etching process is so controlled as to also remove someof the surface of the end layer 41 exposed by the etching of theelectrode 45. As indicated in FIGS. 3 and 4, the remaining exposedportion of 41 comprises its auxiliary region B which has a maximumthickness of about 0.4 mil and extends laterally about one-sixteenthinch from the main region A of the original layer 41. An aluminum gatelead 16 is welded at 47 to the intermediate P-type layer 42 of thewafter adjacent to the distal edge of the relatively thin auxiliaryregion B. the shortest distance therebetween being approximately 15mils.

When the gate contact 47 is energized by a small trig ger signal and thedevice 15 starts to conduct load current supplied by a circuit in whichcurrent is able to increase at a rate of 1500 amps per microsecond, thevoltage across the main electrodes 45 and 46 abruptly drops from theforward blocking voltage magnitude of 700 volts to a level ofapproximately 400 volts, and a momentary potential difference of about300 volts can be measured between electrode 45 (the cathode) and contact47 (the gate). Approximately 0.3 microsecond after conduction starts, asecond triggering action takes place in the device 15 whereupon thegate-cathode potential difference collapses and the anode-cathodevoltage proceeds to delay at a relatively rapid rate to the magnitude ofthe characteristic forward voltage drop of the device while fully on.During the latter interval current will laterally spread from aperipheral section of the main region A to the end layer 41 across thewhole area of the P-N junction between layers 41 and 42 until a state ofuniform current density is reached and the device is fully on.

Other practical embodiments of our invention are illustrated in FIGS.-7. As is shown in FIG. 5, the circular end layer 41 of a semiconductordevice 15a includes a second relatively thin auxiliary region C that issimilar to the above-described region B except for being located on thediametrically opposite side of the layer 41. A peripheral portion of themain electrode 45b of the device 15a is removed above the region C sothat it too is free of main electrode connections. The auxiliary regionC is disposed between the main region A (the portion of the layer 41 onwhich the electrode 45b is superimposed) and a second control electrodeor gate contact 48 that is connected to the adjoining layer 42 of thedevice. By means of a wire 49 the gate contact 48 can be electricallyconnected to either the gate lead 16 or a separate source of gatecurrent (not shown), or as indicated by a broken line 50 in FIG. 5, itcan alternatively be connected to a third gate contact 51 located on thesame layer 42 adjacent to the distal edge of the auxiliary region B. Ifsimultaneous operation of a plurality of parallel-connected NPNP waferswere desired, the gate contact 51 could conveniently be connected to thegate lead of one or more additional devices. The device 15a of FIG. 5 isintended to be otherwise the same as the device 15 previously de scribedwith reference to FIGS. 3 and 4.

The provision of at least one additional gate contact 48 and thetriggering action it elfects when energized will expedite current spreadin the device 15a during the tumon process, thereby further improvingthe switching charactcristics of our SCR. Concurrent triggering actionsat the respective gates are assured by tying them together as shown.This is because of the substantial potential difierencc that momentarilydevelops across the auxiliary region adjacent to whichever one of thegates initially triggers the device. Such potential difi'erenceimmediately produces at the opposite gate a relatively large trigger signal that forces turn-on there. it the trigger signal for the second gate48 is taken from the third gate 51 with no direct connection to thefirst gate 47, the auxiliary region may be omitted because thetriggering action effected by the second gate will always occur at atime when the impressed voltage (and hence the heating that accompanicsthis triggering action) is greatly reduced.

The device 15a shown in FIG. 5 can be further modified by making therelatively thin auxiliary region B annular, as is indicated by thebroken-line circle 52. In this modification the cathode 45b is circularand overlies only that portion (the main region A) of the end layer 41encompassed by the broken line 52. The auxiliary region B circumscribesthe main region A. One or more gates can be used. We believe thisconfiguration enhances the characteristic turn-off properties of thedevice. As a possible alternative, the annular auxiliary region B couldextend radially inwardly with respect to a ring-like cathode, with thegate contact being centrally disposed within the area circumscribed bythis region.

In the embodiment of our invention that is illustrated in FIGS. 6 and 7,the N-type end layer of the semiconductor dev ce 15b comprises a mainregion A and a relatively small auxiliary region B disposed laterallyadjacent thereto. The main region A has a surface contiguous andcoextensive with the cathode 45c, while the auxiliary region B islaterally displaced therefrom. As it is shown in FIGS. 6 and 7, theauxiliary region B, like the corresponding auxiliary regions of thepreviously described embodiments, is characterizcd by a surfacediscontinuity with respect to the main region A, but here its increasedlateral resistance is obtained by introducing a gap in the layer insteadof by reducing its thickness. The gate lead 16 is connected to theintermediate p-type layer of the device 15b adjacent to the auxiliaryregion B as shown.

The semiconductor device 15b is turned on by applying an appropriatetrigger signal between gate 16 and either cathode 45c or another controllead 53 attached to an ohmic contact (shown dotted in FIG. 6) that maybe connected to the exposed surface of the auxiliary region B ifdesired. When turned on either way, load current will initially traversethe auxiliary region B, concentrating relatively close to the P-typelayer adjoining this region. This current actually passes along thesurface of the adjoining P-type layer to bridge the gap formed in theauxiliary region B of the N-type end layer and As a result,] asignificant fraction [of the load current] is [encouraged] forcedimmediately to [transfer to] follow a path through the adjoining layerand through the rectifying junction between that layer and the mainregion A of the end layer, thereby acting The transferred fraction ofcurrent acts] as a relatively high-current trigger signal for theportion of the device 15b subtending the cathode 45c.

The double-triggering turn-on process of an SCR embodying our inventionin any of its various forms can be clearly visualized with the aid ofFIG. 8. In essence our SCR comprises two NPNP devices 61 and 62 insideby-side parallel relationship, with corresponding layers of the twodevices being interconnected. The device 61 has no cathode, and itslateral area is very small compared to that of the device 62. The N-typeend region B of the device 61 is characterized by a relatively highlateral resistance depicted schematically in FIG. 8 at R, and it islocated closer than any part of the corresponding end region A of device62 to the gate which is attached to an intermediate layer of 61. (Notethat the magnitude of R is infinite in the FIGS. 6-7 embodiment'of theinvention.)

With its anode and cathode connected in a load circuit and energized byforward voltage, the SCR is turned on by applying a relatively smalltrigger signal to its gate. Assuming that the gate connection is made tothe P-type intermediate layer of the device, this signal is poled toincrease current in the forward direction through the -N junction at thecathode end of the SCR. (Alternatively, as is shown at 66 in FIG. 8, anN-gate may be used, in which case it would be energized by a signal thatis negative with respect to the anode to increase forward current flowthrough the P-N junction at the anode end of the SCR.) As a result theSCR is triggered, and it quickly starts conducting load current of muchhigher magnitude.

The SCR will start to conduct load current only in a pinpoint areaadjacent to the gate, as is illustrated by the broken line 63 in FIG. 8.Thus the small device 61 is turned on first, and load currentnecessarily traverses the end region B to reach the cathode as indicatedby the horizontal segment 63a of the line 63. To the extent this currentinitially flows through the lateral resistance R of region B, a voltagedrop V develops thereacross and a potential difference of substantialmagnitude will appear between the region A and the edge of region B thatis closest to the gate. By "substantial magnitude we contemplate amagnitude of approximately 20 volts or higher, it being understood thatthe actual magnitude of V depends in part on external circuitparameters.

The lateral resistance R of region B forces a significant fraction ofthe load current [63a initially traversing the region B] to immediatelytransfer to a parallel path 64 comprising the adjoining P-type layer andthe P-N junction between it and the N-type end region A of the device62. The transferred current appears to the device 62 like a relativelylarge trigger signal, and as a result the device 62 is peremptorilyturned on. Load current will now transfer abruptly from the initiallytriggered pinpoint area 63 to a broader area portion of the SCR adjacentto a peripheral section of the end region A, as is illustrated by thedotdash line 65 in FIG. 8. At this time the potential difference Vbecomes negligible, and load current begins rapidly to spread laterallyacross the whole area of the device 62.

The above-described two-step double-triggering action reduces localizedheating in SCRs subjected to relatively high turn-on di/dt duty. Theinitially triggered pinpoint area 63 conducts current for a shorter timethan in prior art SCR's. Furthermore, the momentarily developedpotential difference V will effect a reduction in voltage across theload circuit inductance, thereby limiting the initial rate of rise ofthe current being conducted, and it reduces by a like amount the voltageimpressed across the smallarea region represented by the vertical line63 in FIG. 8. All of these factors contribute to less heat generation at63. No hot spots will develop when load current is transferred to thebroad-area region 65 by the second triggering action, and during thesubsequent current spread the voltage across the SCR will be relativelylow.

Since localized hot spot heating is minimizedduring each turn'onprocess, our SCR's are capable of improved turnoft performance when usedin high switching frequency applications.

As mentioned hereinbefore, our invention is applicable to SCRs havingeither a P-gate or an N-gate. Furthermore, the invention can bepracticed in 3-electrode semiconductor devices having all conductivitytypes and polarities reversed from those shown in FIG. 8. It should beunderstood therefore that the invention applies generally togatecontrolled multilayer semiconductor switching devices.

In the modified device c shown in FIGS. 9 and 10, the cathode-lessregion of the circular end layer 41 of the silicon wafer has twocontiguous parts B and B. Part B is a chordally disposed strip ofrelatively high lateral resistance similar to the auxiliary region thatis identified by the same reference character in FIGS. 3 and 4. Butunlike that region, this part is separated from the gate contact 47 byan adjoining peripheral segment 8' of the end layer 41. The part B isseen in FIGS. 9 and 10 to be disposed in uniformly spaced relation tothe border between part B and the main region A of the end layer, andthere is a coextensive segment of highly conductive metal 10 such asgold ohmically joined to the upper surface thereof. The overlayingsegment 70 is remote from the main electrode 45 and forms no partthereof, although as a matter of manufacturing convenience it can be anisland of the same material isolated from 45 by an etching process. Toprevent accidental contact with the electrode 45, the island 70 10 canbe covered with room temperature-vulcanizing rubber insulation (notshown).

As is clearly shown in FIGS. 9 and 10, the inner edge 71 of theelectroconductive island 70 is parallel to the adjacent edge of thecathode 45. The electrical conductivity of 70 is so much higher thanthat of the silicon part B' over which it lays that when the device 15cstarts conducting load current a substantially equipotential differenceV is developed along the entire length of the edge 71 with respect tothe adjacent border of the main part A of the devices end layer 41.Consequently, current initially traversing the auxiliary region of theend layer 41 between the cathode 45 and the pinpoint area of turn-onnear the gate contact 47 will tend to spread out as represented by thebroken lines in FIG. 10. This improved current distribution ensures theearly transfer of load current in the silicon wafer to a broad areaportion subtending a substantial width of the cathode 45, whereby theturn-on di/dt capability of the semiconductor device is enhanced.

The last-mentioned embodiment of our invention is particularly welladapted for triggering by negative gate signals. For this purpose thegate lead 16 should be connected directly to the island 70 instead of tothe ohmic contact 47 on the intermediate layer 42. When a relativelynegative trigger signal is applied to the island 70, because of therelatively high resistance of part B of the end layer 41 some gatecurrent will pass from part B into the adjoining layer 42 under thisisland, thereby firing the device 15c. As a result, a microplasma ofload current will initially flow through a portion of the devicesubtending the island 70, which current necessarily traverses theauxiliary region B and thereby causes the desired high-speeddouble-triggering turn-on action already explained. We have found thatsuch a device can also be satisfactorily turned on by applying aconventional positive gate signal to the island 70.

The increased di/dt capabilities of gate triggered controlled rectifiersconstructed in accordance with our invention can also be obtained inNPNP semiconductor devices that are turned on in the forward avalanchemode. When such a device is subjected to a forward anode-tocathodevoltage equal to a predetermined breakover magnitude V it switches froma blocking to a conducting state. Conduction starts in a pinpoint areawhere the first microplasma occurs and then progressively spreads overthe whole area of the silicon wafer. The pinpoint area of initialconduction may be in the center or near the edge of the wafer, and itslocation can be predicted by analyzing the impurity gradient of thesilicon stock from which the wafer will be made. If the radial impuritygradient reveals a higher concentration of impurities (hence lowerresistivity} at the center of the stock than at the perimeter, the areain question will be centrally located. On the other hand, if theresistivity is lowest near the perimeter, the pinpoint area of initialconduction probably will be somewhere in a peripheral portion of thewafer.

Actually a device that turns on in the forward avalanche mode can beforced to fire in either a central or a peripheral portion, as desired,by appropriately controlling its impurity gradient or its surfacecontour. The impurity gradient determines the relative V levels of theconstituent portions of the device, while the surface contour determinesthe electric field strengths within these portions for a forwardanode-to-cathode voltage of given magnitude. Either one of theseparameters could be controlled in a device such as that shown in FIGS.3-4 or 9-l0, for example, so that the device always avalanches firstonly in a selected peripheral portion located in the vicinity of thegate contact 47.

The improved turn-on process of our invention is obtainable in any Vtriggered device by providing an annular auxiliary region B in one ofthe end layers of the silicon wafer. This configuration of the auxiliaryregion was suggested hereinbefore in connection with the 11 descriptionof FIG. 5. In FIG. ll a preferred form is shown for a typical device 75that tends to break down first near its periphery.

The fourdayer silicon wafer comprising the device 75 that has beenillustrated in FIG. 111 has an exposed intermediate layer 76 to which agate lead '77 is ohmically attached at 78. The only part of the circularupper layer 79 of the wafer that can be seen in this figure is theannular auxiliary region B of relatively high lateral resistance; themain region of this end layer is in contact with a circular mainelectrode 80 that is superimposed thereon. For reasons to be explainedbelow, an annular island of electroconductive material 80a spaced apartfrom the main electrode 80 overlies a corresponding peripheral part ofthe end layer 79. The island 80a is therefore disposed between theannular auxiliary region B and the gate contact 78. It will be apparentthat any radial cross section of the semiconductor device 75 shown inFIG. 11 will be similar to the right half of the device 15c shown inFIG. 9.

When the device 75 is turned on by raising it anode voltage to V itstarts to conduct load current only in a. pinpoint area that will belocated somewhere along its peripheral edge outside the perimeter of theannular auxiliary region B of the end layer 79. This current mustinitially traverse the relatively high resistance auxiliary region B toreach the main electrode 80, and a significant fraction of itimmediately transfers to a parallel path including the rectifyingjunction that is formed between the main region of the end layer 79 andthe adjoining layer 76 of the wafer. The transferred current will act asa preemptory trigger signal for the portion of the wafer lying under theelectrode 80, whereby the desired two-step, double-triggering turn-onprocess is obtained.

The annular island 80a of gold that is disposed on the peripheral partof the end layer 79 of the device 75 improves the distribution ofinitial conduction through the auxiliary region B by enabling current towidely spread out from the pinpoint area of turn-on, whereby the secondstep of the turn-n process begins at a very broad area of the wafersubtending substantially the whole perimeter of the main electrode 80.This will expedite current spread in the device during the turn-onprocess. The metal 80a also serves the useful purpose of preventing theexposed edge of the P-N junction between the silicon layers 76 and 79from being adversely affected by the manufacturing process (e.g.,etching) that is used to remove the main electrode from and to reducethe thickness of the annular auxiliary region B of the end layer 79.

If the V triggered device were known to breakover first at its center, aring-like main electrode with an inboard, relatively high lateralresistance auxiliary region in the associated end layer of the siliconwafer should be used. Such a device could have an eccentric gate contactsimilar to that shown :it 48 in FlG. 5, or it could be pruvidcd with anannular auxiliary region and a concentric gate us is shown in FIGS. 12and 13. The latter figures reveal an NPNP semiconductor device 75acomprising a silicon wafer of four layers 81, 82, 83, and 84, with aring-like cathode 85 being connected to a conforming face of the mainregion of the N-type end layer 81. Extending inwardly beyond the innerperimeter of the cathode 85 is a annular, relatively thin auxiliaryregion 81a of the end layer 81. inside this region the adjoiningintermediate layer 82 of the wafer is exposed for connection to the gatelead 77 at a centrally disposed contact 78a. With this arrangement thepreviously described double-triggering turn-on process is obtainedregnrdlcss of whether switching is initiated by gate triggering or byanode triggering.

It will be apparent to those skilled in the art that the HHS. l2--l3form of our invention could be modified by adding an isolated goldoverlay (not shown) to a part ol the auxiliary region 813. that isspaced apart from the main region of the end layer 81. This overlaywould serve the same useful purposes as the island 80a of the previouslydescribed FIG. ll embodiment of our invention. If a negative gate signalwere used, the inboard auxiliary region can be solid instead of annular,and the gate lead can be connected directly to the addedelectroconductive material overlaying the central part of this region.

The improved turn-on process that is obtained in the embodiments of ourinvention shown in FIGS. ll-l3 will enable these devices to operatesuccessfully at a substantially higher di/dt rating than has heretoforebeen possible in prior art V triggered devices. This result isparticularly advantageous in high voltage applications where a string ofseries-connected SCRs is used to switch a relatively high voltagecircuit. Although trigger signals are simultaneously applied to thegates of all of the SCRs in such a string, some of the devices may notturn on as fast as others. Therefore there is a real possibility that atleast the slowest SCR will be turned on in its forward avalanche mode.The increased turn-on di/dt rating of devices constructed in accordancewith our invention will obviously improve the di/dt capabilities of thecombined string of devices in this setting.

While various alternative forms of our invention have been shown anddescribed in detail by way of illustration, other modifications willprobably occur to those skilled in the art. We therefore contemplate bythe concluding claims to cover all such modifications as fall within thetrue spirit and scope of the invention.

What we claim as new and desire to secure by Letters Patent of theUnited States is:

[1. A controlled rectifier comprising:

(a) first and second main electrodes having spacedapart contactsurfaces;

(b) a body of semiconductive material disposed between said electrodes,said body having at least three layers arranged in succession withcontiguous layers being of different conductivity types, wherebyrectifying junctions are formed between contiguous layers of the body;and

(c) a control electrode;

(d) the contact surface of said first main electrode being connected toa predetermined end layer of said body, the contact surface of thesecond main electrode being connected to the opposite end layer of saidbody, and said control electrode being connected to an intermediatelayer of said body;

(e) said predetermined end layer comprising a main region having asurface that is contiguous and substantially coextensive with thecontact surface of said first main electrode and a relatively smallauxiliary region disposed laterally adjacent to said main region betweensaid main region and said control electrode connection, both of saidregions being contiguous with the intermediate layer of said body thatadjoins said predetermined end layer;

(f) said auxiliary region being so constructed and arranged that, uponenergization of the control electrode by a trigger signal to turn on therectifier, load current will initially traverse said auxiliary regionand a significant fraction thereof will immediately transfor to a paththrough said adjoining layer and through the rectifying junction betweensaid adjoining layer and the main region of said predetermined endlayer, whereby said fraction of load current bypasses said auxiliaryregion and acts as a relatively high-current trigger signal for theportion of said body subtending the contact surface of said first mainelectrode] [2. A controlled rectifier comprising:

(a) first and second main electrodes having spacedapart contactsurfaces;

tb) a wafer of semiconductive material disposed between said electrodes,said wafer having four layers 13 arranged in succession with contiguouslayers being of different conductivity types; and

(c) a control electrode;

(d) the contact surface of said first main electrode being connected toa predetermined end layer of said water, the contact surface of thesecond main electrode being connected to the opposite end layer of thewafer, and said control electrode being connected to one of theintermediate layers of said wafer;

(c) a control electrode connected to an intermediate layer of saidwafer; and

(c) said predetermined end layer comprising a main (d) saidpredetermined end layer comprising a main region having a surface thatis contiguous and subregion having a surface that is contiguous with thestantially coextensive with the contact surface of said whole area ofthe contact surface of said one main first main electrode and anadjacent auxiliary region electrode and an adjacent auxiliary regionlocated that extends laterally at least two mils from said main betweensaid main region and said control electrode region, said auxiliaryregion being located closer than connection, said auxiliary region beingcharacterized any part of said main region to said control electrode bya surface discontinuity with respect to said main connection and beingcharacterized by a lateral resistregion whereby load current initiallytraversing the ance appreciably higher than that of any part of saidauxiliary region upon energization of said control main region ofcorresponding lateral dimension] electrode to turn on the semiconductordevice is con [3. A semiconductor device comprising: centratedrelatively close to the intermediate layer of (a) first and second mainelectrodes having spacedsaid body adjoining the auxiliary region] 6. Asilicon controlled rectifier comprising:

(a) a pair of main electrodes having spaced-apart contact surfaces;

(b) a body of silicon disposed between said electrodes,

apart contact surfaces;

(b) a body of semiconductive material disposed between said electrodes,said body having a plurality of layers arranged in succession withcontiguous layers being of different conductivity types, a predeterminedend layer of the body being connected to the contact surface of thefirst main electrode and the opposite end layer of the body beingconnected to the contact said body having a plurality of relatively thinlayers arranged in succession with contiguous layers being of differentconductivity types and each of the end layers being connected to thecontact surface of a surface of the second main electrode; and 39corresponding one of said electrodes; and

(c) a control electrode connected to an intermediate (c) a controlelectrode connected to an intermediate layer of the body; layer of thebody;

(d) said predetermined end layer comprising a main (d) one of said endlayers having a portion of reduced region having a surface that iscontiguous and subthickness extending laterally approximatelyonestantially coextensive with the contact surface of said sixteenthinch beyond the associated contact surface, first main electrode and arelatively small auxiliary said laterally extending portion being nomore than region disposed laterally adjacent to said main region 90percent as thick as the adjoining portion of said between said mainregion and said control electrode one end layer and having a distal edgethat IS the connection, said auxiliary region being so constructed 40part of said one end layer closest to said control and arranged thatupon energization of the control electrode connection. electrode to turnon the semiconductor device a 7. Asemiconductor device comprising:potential difference of substantial magnitude initially (a) a pair ofmain electrodes having spaced-apart conwill develop between said mainregion and the edge tact surfaces; of said auxiliary region that isclosest to said control (b) a body of semiconductive material disposedbeelectrode connection] tween said electrodes, said body having aplurality [4. A relatively high-current semiconductor device of layersarranged in succession with contiguous comprising: layers being ofdifferent conductivity types and each (a) a pair of main electrodeshaving parallel, spacedof the end layers being connected to the contactapart contact surfaces, the contact surfaces of a presurface of acorresponding one of said electrodes; determiiied one of said mainelectrodes being asyrn- (c; a coptipl begtfalctrodtzi connected to anintermediate metrica ayer o t e y; an

(b) a wafer of semiconductive material disposed be- (d) one of said endlayers having a portion that is tween said electrodes and having aplurality of cirlaterally displaced with respect to the associatedconcular layers arranged in succession with contiguous tact surface andthat is electrically isolated from the layers being of differentconductivity types, a pre- 5 main electrode to which the other end layeris condcterrnined end lzltyer of the wafer beifng ccnnectfd to nectecilsaifd 11%!121011 h6g1? separated from sh; rethe asymmetrica contact surace 0 sai pre etermam r o as: one en ayer y a gap an cing mined mainelectrode and the opposite end layer of disposed closer than saidremainder to said control the wafer being connected to the contactsurface of elegtrode cognectton, said body being so constructed th h r il d d 69 an arrange that upon energization of said control (c) a controlelectrode connected to an intermediate eleafodc to turf! onscmlcollfluclol devlafi, a m f Said f stantial potential differenceinitially will develop (d) said predetermined end layer comprising amain across f region having a major face that substantially con- A m ildcvlce 'g f 1 forms to and is contiguous with the whole area of z z'n?t f rges atvmtg pafra IeLfspacedsaid asymmetrical contact surface and anadjacent g g g i g slf f gg i j i i a g: auxiliary region locatedbetween said main region Circular 0 5 m g n i g f i allx'hary (b) asilicon wafer disposed between said electrodes rcglo p f e "9 econnect'onsj 70 having a plurality of circular layers arranged in sucyhlgh'culrem semlconducmr davlce cession with contiguous layers being ofdifferent concomlmsmgi ductivity types, a predetermined end layer of thei1 P of mill" electrodes having Parallel, p wafer being connected to thenoncircular contact p t Contact surfaces; surface of said predeterminedmain electrode and (b) a wafer of scmiconductive material disposed bethe opposite end layer of the wafer being connected to the contactsurface of the other main electrode;

(c) a control electrode connected to an intermediate layer of saidwafer; and

(d) said predetermined end layer comprising a main region having a majorface that is contiguous with the whole area of said noncircular contactsurface and an auxiliary region disposed laterally adjacent to the mainregion between it and said control electrode connection, said auxiliaryregion being free of main electrode connections and being so constructedand arranged that upon energization of the control electrode to turn onthe semiconductor device a potential difference of substantial magnitudeinitially will develop between said main region and the edge of saidauxiliary region that is closet to said control electrode connection][9. A semiconductor device comprising:

(a) a pair of main electrodes having parallel, spacedpart contactsurfaces, the contact surface of a predetermined one of said mainelectrodes being noncircular;

(b) a silicon wafer disposed between said electrodes having a pluralityof circular layers arranged in succession with contiguous layers beingof different conductivity types, a predetermined end layer of the waferbeing connected to the noncircular contact surface of said predeterminedmain electrode and the opposite end layer of the wafer being connectedto the contact surface of the other main electrode; and

(c) a control electrode connected to an intermediate layer of saidwafer;

(d) said predetermined end layer comprising a main region having a majorface contiguous with the whole area of said noncircular contact surfaceand an auxiliary region disposed laterally adjacent to the main regionbetween it and said control electrode connection said auxiliary regionbeing free of,main electrode connections and being characterized by asurface discontinuity with respect to said main region.]

10. The device set forth in claim 9 in which said surface discontinuityis formed by making the auxiliary region thinner than the main region.

11. A controlled rectifier comprising:

(a) a pair of main electrodes having spaced-apart contact surfaces;

(b) a four-layer NPNP wafer of silicon disposed between said electrodes,each of the end layers of the wafer being connected to the contactsurface of a corresponding one of said electrodes;

(c) first and second control electrodes connected to an intermediatelayer of the wafe;

(d) one of said end layers comprising a main region subtending theentire contact surface of the corresponding main electrode and first andsecond auxiliary regions extending laterally from the main region, thefirst auxiliary region being disposed between said main region and saidfirst control electrode connection. the second auxiliary region beingdisposed between said main region and said second control electrodeconnection; and

(c) each of said auxiliary regions being characterized by a lateralresistance appreciably higher than that of any part of said main regionof the same lateral dimension.

2. A semiconductor device comprising:

(a) a pair of main electrodes having spaced-apart contact surfaces:

(b) a body of scmiconductive material disposed between said electrodes,said body having a plurality of relatively thin layers arranged insuccession with contiguous layers being of diil'erent conductivity typesand each of the end layers being connected to 16 the contact surface ofa corresponding one of said electrodes;

(c) a first control electrode connected to an intermediate layer of thebody;

(d) one of said end layers having a predetermined portion of reducedthickness extending laterally beyond the associated contact surface,said predetermined portion having a distal edge that is the part of saidone end layer closet to said first control electrode connection; and

(e) second and third conductively interconnected [connected] controlelectrodes connected at different positions to the intermediate layer ofthe body adjoining said one end layer, one of said positions beingdisposed adjacent to said distal edge of said predetermined portion ofsaid one end layer.

13. A controlled rectifier comprising:

(a) first and second main electrodes having spacedapart contactsurfaces,

(b) a wafer of semiconductive material disposed between said electrodes,said wafer having four layers arranged in succession with contiguouslayers being of different conductivity types;

(c) a control electrode,

(d) the contact surface of said first main electrode being connected toa predetermined end layer of said wafer, the contact surface of saidsecond main electrode being connected to the opposite end layer of thewafer, and said control electrode being connected to one of theintermediate layers of said wafer;

(e) said predetermined end layer comprising a first part having asurface that is contiguous [and substantially coextensive] with thecontact surface of said first main electrode, an adjacent second partextending laterally from a border of said first part, and a third partadjoining said second part in substantially uniformly spaced relation tosaid border, said second part being located closer than said first partto said control electrode connection and said third part being locatedbetween said second part and said control electrode connection; and

(f) electroconductive material overlaying said third part of saidpredetermined end layer remote from said first main electrode.

14. The rectifier of claim 13 in which said predetermined end layer iscircular and said second part thereof is a chordally disposed strip ofsemiconductive material having a lateral resistance appreciably higherthan that of any section of corresponding lateral dimension in saidfirst part of said predetermined end layer.

15. A controlled rectifier comprising:

(a) first and second main electrodes having spaced apart contactsurfaces;

(b) a wafer of semiconductive material disposed between said electrodes,said wafer having four layers arranged in succession with contiguouslayer being of different conductivity types;

(c) means for connecting the contact surface of said first mainelectrode to a predetermined end layer of said wafer and means forconnecting the contact surface of said second main electrode to theopposite and layer of said wafer;

(d) said predetermined end layer comprising a first part having asurface conforming to the contact surface of said first main electrode,an adjacent second part extending laterally from a border of said firstpart, and a third part adjoining said second part in spaced-apartrelation to said first part, said second part being characterized by alateral resestance appreciably higher than that of any section ofcorresponding lateral dimension in said first part;

(e) electroconductive material overlaying said third part of saidpredetermined end layer remote from said first main electrode; and

which a control electrode is connected to said intermediate layer.

19. The semiconductor device of claim 18 in which said inboard auxiliaryregion of said predetermined end layer is annular and circumscribes saidcontrol electrode connection.

20. In a semiconductor device adapted to conduct load (f) a controlelectrode connected to said electroconductive material.

16. In a semiconductor device adapted to conduct load current whentriggered:

(a) first and second load current-carrying electrodes having space-apartcontact surfaces;

(b) a body of semiconductive material disposed be tween said electrodes,said body having four layers arranged in succession with contiguouslayers being current when triggered:

(a) first and second load current-carrying electrodes of differentconductivity types whereby rectifying having spaced-apart contactsurfaces; junctions are formed between contiguous layers of (b) a bodyof semiconductive material disposed bethe body; tween said electrodes,said body having a plurality (c) means for connecting the contactsurface of said of layers arranged in succession with contiguous firstelectrode to a predetermined end layer of said layers being of differentconductivity types, whereby body and means for connecting the contactsurface rectifying junctions are formed between contiguous of saidsecond electrode to the opposite end layer layers of the body; of saidbody; (c) a predetermined end layer of said body being con- (d) saidpredetermined end layer comprising a cirnected to the contact surface ofsaid first electrode cular main region having a surface thatsubstantially and the opposite end layer of said body being conconformsto the whole area of the contact surface of nected to the contactsurface of said second elecsaid first electrode and an annular auxiliaryregion trode; disposed laterally adjacent to said main region, both (d)said predetermined end layer comprising a first of said regions beingcontiguous with the intermedipart having a surface that is contiguouswith the ate layer of said body that adjoins said predetermined [wholearea of the] contact surface of said first elecend layer; and trade, anadjacent second part extending laterally (e) an annular island ofelectroconductive material from a border of said first part, and a thirdpart ad spaced apart from said first electrode and connected joiningsaid second part in spaced-apart relation to to said auxiliary region ofsaid predetermined end said first part, said second part being soconstructed y and arranged that, upon triggering of the device, load (f)said auxiliary region being so constructed and current initiallytraversing it will cause a potential arranged that, upon triggering ofthe device, load difference of substantial magnitude to developbecurrent will initially traverse said auxiliary region tween said firstand third parts; and and a significant fraction thereof will immediatey(e) an island of electroconductvie material overlaying transfer to apath through the adjoining layer and said third part of saidpredetermined end layer rethrough the rectifying junction between saidadjoin- 5 mote from said first electrode, whereby the load curing layerand the main region of said predetermined end layer, whereby saidfraction of load current bypasses said auxiliary region and acts as aperemptory trigger signal for the portion of said body subtending (b) abody of semiconductive material disposed between said electrodes, saidbody having four layers arranged in succession with contiguous layersbeing of different conductivity types, whereby rectifying rent initiallytraversing said second part is encouraged to cross an appreciable lengthof the border of said first part and a significant fraction of thiscurrent is quickly transferred to a parallel path including a thecontact surface of said first electrode. relatively wide area of therectifying junction be- [17. In a semiconductor device adapted toconduct tween the first part of said predetermined end layer loadcurrent when triggered: and a contiguous intermediate layer of saidbody.

(a) first and second load current-carrying electrodes A Controlled ficomprising! having spaced apart contact surfaces, the contact (a) a pairof main electrodes having spaced-apart consurface of said firstelectrode being ring-like, and M Surfaces" (b) a semiconductor bodydisposed between said electrodes, said body having a plurality of layersarranged in succession with contiguous layers being of difierentconductivity types and each of the end junctions are formed betweencontiguous layers of 5 y being connected me Contact I a h b dcorresponding one of said electrodes,-

(c) the ring-like contact surface of said first electrode d, mm!eleclrvde wfl'lecled the inlermediale being connected to a predeterminedend layer of said layer of the body that is contiguous with apredeterbody and the contact surface of said second electrode i d one fsaid end y and being connected to the opposite end layer of said 55 saidone end having an auxiliary "8 body; erally displaced with respect tothe associated con- (d) said predetermined end layer comprising a maintact surface and electrically isolated from the main region having asurface that is contiguous with the l t de to h h he other nd lay r isConnectedwhole area of said ring-like contact surface and an saidauxiliary region being separated from the reinboard auxiliary regionlaterally adjacent to said 50 mainder of said one end layer by a gap,said body main region, both of said regions being contiguous being soconstructed and arranged that upon enerwith the intermediate layer ofsaid body that adjoins g zation of said control electrode :0 rum on mesaid predetermined end layer; rectifier the path that initially conductsload current (e) said auxiliary region being so constructed and arwilll'ndllde auxiliary region f Mid 8nd layer, ranged that, upon triggeringof the devi e, load u a portion of said intermediate layer between saidrent will initially traverse said auxiliary region and xi y region and ireminder, n h f a significant fraction thereof will immediatelytranslion between said intermediate layer and said refer to a paththrough said adjoining layer and through m linderthe rectifying junctionbetween said adjoining layer A cvnlfvlled rectifier P L and the mainregion of said predetermined end layer P f main electrodes having p Pwhereby said fraction of load current bypasses said Surfaces; auxiliaryregion and acts as peremptory trigger sig- (b) a four-layer NPNP waferof silicon disposed benal for the portion of said body subtending saidringtween said electrodes, each of the end layers of the like contactsurface of said first electrode] wafer being connected to the contactsurface of a 18. The semiconductor device of claim [17] 33 in);corresponding one of said electrodes;

(c) first and second control electrodes connected to an intermediatelayer of the wafer;

(d) one of said end layers comprising a main region subtending thecontact surface of the corresponding main electrode and first and secondauxiliary regions extending laterally from the main region, the firstauxiliary region being disposed between said main region and said firstcontrol electrode connection, the second auxiliary region being disposedbetween said main region and said second control electrode connection;and

(e) each of said auxiliary regions being characterized by a lateralresistance appreciably higher than that of any part of said main regionof corresponding lateral dimension.

23. The controlled rectifier of claim 22 in which said first controlelectrode is adapted to be energized by a first trigger signal to turnon the rectifier, and means is provided for applying to said secondcontrol electrode a second trigger signal produced by the potentialdifference that initially develops between said main region and thedistal edge of said first auxiliary region upon energization of saidfirst control electrode.

24. A semiconductor device comprising:

(a) first and second main electrodes;

(b) a semiconductor body disposed between said electrodes, said bodyhaving a plurality of layers arranged in succession with contiguouslayers being of difierent conductivity types, a predetermined end layerof the body being connected to the first main electrode and the oppositeend layer of the body being connected to the second main electrode;

(c) first and second control electrodes connected to an intermediatelayer of the body;

(d) said predetermined end layer comprising a main region contiguouswith said first main electrode and an auxiliary region disposedlaterally adjacent to said main region between said main region and saidfirst control electrode connection, said auxiliary region being free ofmain electrode connections and being so constructed and arranged thatupon energization of said first control electrode to turn on thesemiconductor device a potential difference of substantial magnitudeinitially will develop between said main region and the edge of saidauxiliary region that is closest to said first control electrodeconnection; and

(e) means for applying to said second control electrode a trigger signalproduced by said potential difierence.

25. The device of claim 24 in which staid last-mentioned meanscomprises: a third control electrode connected to the intermediate layerof said body adjoining said predetermined end layer at a positionadjacent to said edge of said auxiliary region, and means forconductively interconnecting said second and third control electrodes.

26. In a semiconductor device adapted to conduct load current whentriggered:

(a) first and second load current-carrying electrodes havingspaced-apart contact surfaces;

(b) a semiconductor body disposed between said electrodes, said bodyhaving a plurality of layers arranged in succession with contiguouslayers being of different conductivity types, whereby rectifyingjunctions are formed between contiguous layers of the body:

(c) a predetermined end layer of said body being connected to thecontact surface of said first electrode and the opposite end layer ofsaid body being connected to the contact surface of said secondelectrode;

(d) said predetermined end layer comprising a first part having asurface the whole area of which is contiguous with the contact surfaceof said first electrode, a second part disposed laterally adjacent to aborder of said first part, and a third part adjoining said second partin spaced-apart relation to said first part; and

(e) an island of electroconductive material over-laying the third partof said predetermined end layer remote from said first electrode;

(f) said device being so constructed and arranged that,

upon triggering thereof, the path that initially conducts load currentwill include said island and the second part of said predetermined endlayer and at least a portion of the initial load current will flowthrough the rectifying junction between said first part and a contiguousintermediate layer of said body.

27. A controlled rectifier comprising:

(a) first and second main electrodes having spacedapart contactsurfaces;

(b) a body of semiconductive material disposed between said electrodes,said body having at least three layers arranged in succession withcontiguous layers being of different conductivity types, wherebyrectifying junctions are formed between contiguous layers of the body;and

(c) a control electrode;

(d) the contact surface of said first main electrode being connected toa predetermined end layer of said body, the contact surface of thesecond main electrode being connected to the opposite end layer of saidbody, and said control electrode being connected to an intermediatelayer of said body;

(e) said predetermined end layer comprising a main region and anauxiliary region laterally adjacent thereto, said main region beingcontiguous with both the first main electrode and the intermediate layerof said body that adjoins said predetermined end layer and saidauxiliary region being free of main electrode connections, both of saidregions being disposed in a current path which, upon energization ofsaid main electrodes and application of a trigger signal to said controlelectrode for turning on the rectifier, conducts initial load currentbetween said main electrodes, said path having a predetermined segmentwhich includes said auxiliary region and extends from said main regionto a rectifying junction formed between said adjoining intermediatelayer and said auxiliary region,

(f) said predetermined segment of said path having higher resistance tocurrent therein than the resistance of said main region in a likenumerical portion of said path, whereby an immediate and progressivelygreater fraction of load current transfers to an alternative pathincluding said adjoining intermediate layer and the rectifying junctionformed between said adjoining intermediate layer and said main region,said fraction of load current bypassing said auxiliary region and actingas a relatively highcurrent trigger signal for the portion of said bodysubtending said first main electrode.

28. The controlled rectifier of claim 27 in which said auxiliary regionis disposed between the control electrode connection and the main regionfrom which it laterally extends at least two mils and is characterizedby a lateral resistance appreciably higher than that of said mainregion.

29. A semiconductor device comprising: 4

(a) first and second main electrodes having spacedapart contactsurfaces;

(b) a body of semiconductive material disposed between said electrodes,said body having a plurality of layers arranged in succession withcontiguous layers being of different conductivity types, a predeterminedend layer of the body being connected to the contact surface of thefirst main electrode and the opposite end layer of the body beingconnected to the contact surface of the seocnd main electrode; and

(c) a control electrode connected to an intermediate layer of the body;

(d) said predetermined end layer comprising:

(i) a main region contiguous with both the first main electrode and theintermediate layer of said body that adjoins said predetermined endlayer, a first rectifying junction being formed between said main regionand said adjoining intermediate layer, and

(ii) a relatively small auxiliary region located laterally adjacent tosaid main region and contiguous with said adjoining intermediate layer,said main and auxiliary regions being serially disposed in a currentpath which, upon energization of said main electrodes and application ofa trigger signal to said control electrode for turning on the device,conducts initial load current between said main electrodes, saidauxiliary region being included in a segment of said path extending fromsaid main region to a rectifying junction formed between said auxiliaryregion and said adjoining intermediate layer;

(e) said segment having greater resistance in said current path than theresistance of said main region in said current path for developingacross said segment, when initially conducting load current, sufiicientpotential difference for causing a magnitude of load current flowthrough said first rectifying junction for constituting a relativelyhigh-current trigger signal for the portion of said body subtending saidfirst main electrode.

30. The semiconductor device of claim 29 in which said body ofsemiconductive material is a silicon wafer, said plurality of layers arecircular, the contact surface of said first main electrode isnoncircular, said main region is contiguous with said noncircularcontact surface, said auxiliary region is disposed between said mainregion and the control electrode connection and is free of mainelectrode connections, and said auxiliary region presents a resistancein relation to the resistance of said main region for a significantfraction of said load current to flow through said first rectifyingjunction upon application of the trigger signal to said controleelctrode.

31. A relatively high-current semiconductor device comprising:

(a) a pair of main electrodes having parallel, spacedapart contactsurfaces;

(b) a wafer of semiconductive material disposed between said electrodesand having a plurality of layers arranged in succession with contiguouslayers being of diflerent conductivity types, a predetermined end layerof the wafer being connected to the contact surface of one of said mainelectrodes and the opposite end layer of the wafer being connected tothe contact surface of the other main electrode,

(c) a control electrode connected to an intermediate layer of saidwafer; and

(d) said predetermined end layer comprising a main region and anadjacent auxiliary region, said main region being contiguous with bothsaid one main electrode and the intermediate layer of said wafer thatadjoins said predetermined end layer and forming a rectifying junctionwith said adjoining intertermediate layer, both of said regions beingdisposed in a current path which, upon encrgization of said mainelectrodes and application of a trigger signal to said control electrodefor turning on the device, conducts initial load current between saidmain electrodes;

(at) said auxiliary region having a surface dist-on tinuity with respectto the surface of said main region and being dimensioned and located inrelation to said main region for directing at least a portion of theload current through said rectifying junction in sufficient magnitudefor constituting a peremptory trigger signal for a relatively broad areaof said water subtending said one main electrode.

32. The semiconductor device for claim 21 in which said semiconductivematerial is silicon, the contact surface of said one main electrode isnoncircular, said main region has a major face contiguous with saidnon-circular contact surface, said auxiliary region is disposed betweensaid main region and the control electrode connection and is free ofmain electrode connections, and the surface discontinuity of saidauxiliary region is productive of resistance distribution for directingload current initially traversng said auxiliary region into aconcentration relatively close to said adjoining intermediate layer ofsaid wafer.

33. In a semiconductor device adapted to conduct load current whentriggered:

(a) first and second load current-carrying electrodes having spacedapart contact surfaces, the contact surface of said first electrodebeing ring-like, and

(b) a body of semiconductive material disposed between said electrodes,said body having four layers arranged in succession with contiguouslayers being of diflerent conductivity types, whereby rectifyingjunction are formed between contiguous layers of the body;

(c) the ring-like contact surface of said first electrode beingconnected to a predetermined end layer of said body and the contactsurface of said second electrode being connected to the opposite endlayer of said body;

(d) said predetermined end layer comprising a main region and an inboardauxiliary region laterally adjacent thereto, said main region beingcontiguous with both the ring-like contact surface of said firstelectrode and the intermediate layer of said body that adjoins saidpredetermined end layer, both of said regions being disposed in acurrent path which, upon triggering of the device, conducts initial loadcurrent between said electrodes, said path having a predeterminedsegment which includes said auxiliary region and extends from said mainregion to a rectifying junction formed between said intermediate layerand said auxiliary region,

(e) said predetermined segment of said path having higher resistance tocurrent therein than the resistance of said main region in a likenumerical portion of said path, whereby, upon triggering the de vice, animmediate and progressively greater fraction of load current transfersto an alternative path including said intermediate layer and therectifying junction formed between said intermediate layer and said mainregion, said fraction of load current bypassing said auxiliary regionand constituting a peremptory trigger signal for the portion of saidbody subtending said ring-like Contact surface of said first electrode.

34. A semiconductor device comprising:

(a) first and second main electrode haivng spacedapart contact surfaces;

(1)) a semiconductor body disposed between said electrodes, said bodyhaving a plurality of layers arranged in succession with contiguouslayers being of different conductivity types, a predetermined end layerof the body being connected to the contact surface of the first mainelectrode and the opposite end layer of the body being connected to thecontact surface of the second main electrode; and

(c) a control electrode connected to an intermediate layer of the body,-

(d) said predetermined end layer comprising:

(i) a main region having a surface the whole area of which is contiguouswith the contact surface of said first main electrode, a firstrectifying junction being formed between said main region and theintermediate layer of said body References (Jud adjoining saidpredetermined end layer, and (ii) a relatively small auxiliary regionlocated laterally adjacent to said main region, said The followingreferences, cited by the Examiner, are of record in the patented file ofthis patent or the original main and auxiliary regions being seriallydispatent UNITED STATES PATENTS posed in a current path which, uponenergizaion of said main electrodes and application 3 L 11/1958 R055 3 5X of a trigger signal to said control electrode for 2,993,154 7/ 1951 B!317235 turning on the device, conducts initial load 3,150,800 12/1964Smart current between said main electrodes, said aux- 10 3,263,1397/1955 iliary region being included in a segment of 3,277,310 10/1966Scheme! 317-235 X said path extending from said main region to 3,300,6941/1967 stelmey et aL 317-235 a rectifying junction formed between saidaux- SGtem g t-lreen erg e a.

' and lom'ng e 15 3,026,424 3/1952 Pomerantz 317-235 X (e) said segmenthaving greater resistance in said FOREIGN PATENTS current path then theresistance of said main region 1,379,254 10/1964 France in said currentpath for developing a substantial potential difierence across saidsegment when initial- JAMES KALLAM, primary Examiner ly conducting loadcurrent. 20

Patent No.

Inventofls) It is certified that error appears; in the nhovcwidnntifirm!j 4 A. L. DeCecco,

1 m q ra m 1M1; i. if:

D. E. Piccone & I. Somos and that said Letters Patent are herubycorrected as 911mm below:

Claim Claim Claim Claim Claim Claim Claim line lineline last

line

line

Signed and (SEAL) Attes-t:

EDWARD M.FLETCHER,JR. Attesting Officer change "junction" to junctionsline sealed this 8th day of May 1973.

ROBERT GOTTSCHALK Commissioner of Patents 58 change "electrode" toelectrodes-

